![]() Moreover, the cross-talk of the novel 9T and traditional 8T GSI pixels are 20% and 19%, respectively, which is comparable. The damage will increase trap charges and interface state defects, which will lead to increased leakage of MOS devices and eventually, increase the dark current of the pixel unit. The part other than the active region in the conventional transistor structure is the STI region for isolation, and the formation process of the STI requires the use of a dry etching process, which often causes plasma damage on the STI sidewall. The area where the active area and the polycrystalline gate overlap is the channel part of the transistor, which is doped through the P well implantation and defines the turn-on voltage of the device and defines the source and drain of the transistor through N+ implantation. For the sake of illustration, subsequent metal interconnection layers are not marked in the schematic. As shown in Figure 7, taking NMOS transistors commonly used in CMOS image sensors as an example, the layout levels commonly used include active area (Active), polycrystalline gate (Poly), N+ implantation, P+ implantation, and contact hole (CT). At the same time, the demand for high-quality application scenarios further puts higher requirements for dark current.Īt first, we evaluate the effect of the merged active area on a single transistor. Moreover, the high-performance voltage-domain global pixel unit needs to integrate far more transistors than the conventional 4T rolling shutter pixel unit, resulting in a decline in the performance of the pixel unit. ![]() Since the global shutter pixel needs to store the signal inside the pixel, the pixel cell size of the high-performing voltage domain is usually more than five microns, resulting in a decrease of the resolution of the image sensor in the unit area. Figure 2 illustrates the typical cell layout of an 8T GSI pixel. Furthermore, in order to obtain Correlated Double Sampling with a lower noise level, an 8T GSI pixel structure for high-quality image applications is developed. For example, for a 5T GSI pixel, a separate exposure control transistor is added next to PPD to provide global exposure, which is more suitable for an ultra-fast working environment. Since that, many novel pixel architectures have been developed based on this structure. Due to the low noise and high output image signal, the 4T pixel has become the mainstream pixel structure. Compared with the original 3T GSI pixel, the new 4T GSI pixel used PPD instead of PD and added a charge Transfer transistor (TX). With the development of pinned photodiode (PPD) technology, a 4T GSI pixel process is developed, which can effectively inhibit Johnson–Nyquist (KTC) noise and obtain high voltage gain. ![]()
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